From its beginning the semiconductor industry has relied on transistor miniaturization in order to increase computation performance. However, as transistor sizes are soon to reach their fundamental limit, a replacement for the current CMOS (complementary metal oxide semiconductor) technology has been widely sought. Multiple Valued Logic (MVL) has several advantages over binary logic for very-large-scale-integration (VLSI) design, as complex arithmetic operations can be performed with a reduced number of MOS transistors. Research on ternary logic (three-value logic) based on standard MOSFETs (metal oxide semiconducting field effect transistors) has been conducted in the 1980s.
However, this technology was never widely implemented. Resonant-Tunneling Bipolar Transistor (RTBT) and similar resonant-tunneling devices, particularly devices with multiple negative differential resistance (MNDR), have also been proposed as building blocks for MVL circuits. RTBT devices are three terminal heterojunction bipolar transistors and hence are fundamentally different from, and are not compatible with, current CMOS technology. Furthermore, such devices consist of non-conventional elements limiting wide spread implementation of the devices. Several other multiple valued logic devices have been proposed but, as for the RTBT device, they cannot be implemented into current VLSI technology.